Baya- AI Enabled SoC Intgration Platform, IP-XACT 1685, UPF, Verilog and VHDL Parsers, Translators & Converters, Datamodel and Re-Writers
Baya - Auto Integration of SoC Components with IP-XACT & Tcl API
This utility has been develop to generate documentation of the IP/SubSystem from its RTL definition. I primarily populates the Parameters, Ports and the REGISTER details to ensure that this doc is correct by construction. It tries to extract the inline comments in the RTL and populate the relevation description section. The user is advised to review the generated description to make it look better.
Document Generator from System Verilog