Baya is a free SoC integration tool from EDAUtils. It assembles a system-on-chip or subsystem from IP blocks described in IEEE 1685 IP-XACT, Verilog or VHDL, connects them by rule, manipulates the hierarchy, and writes out connected RTL. It has been used for IP assembly at Intel, Texas Instruments, NVIDIA, Samsung, Renesas and 40+ other semiconductor companies, with 200K+ recorded tool usages.
What SoC integration means
SoC integration (also called IP integration or IP assembly) is the step in VLSI design where dozens to hundreds of IP blocks - CPU cores, memory controllers, DMA engines, bus fabrics, peripherals - are instantiated, their AXI4, AHB, APB, PCIe, DDR or custom interfaces are connected, glue logic is inserted, and a top-level RTL netlist is produced for simulation, synthesis and physical design. Done by hand it is slow and error-prone: a large SoC has tens of thousands of port connections. An SoC integration tool automates instantiation, connection and hierarchy so that the top level is generated, not hand-written.
What Baya does
- Reads IPs in any form: IP-XACT components, Verilog modules, VHDL entities, or SystemVerilog interfaces. verilog2baya converts an existing SoC into the Baya database in one command.
- Connects by rule: interface-based auto-connection for AXI4, AXI-Lite, AHB, APB, PCIe, DDR/LPDDR, USB, Ethernet and user-defined protocols; ad-hoc port-to-port connections; XLS/CSV-driven connection tables.
- Manipulates hierarchy: create and remove levels, flatten, group instances into power or voltage domains, insert spare ports through hierarchies.
- Inserts glue logic and auto-creates top-level ports from rules.
- Checks: IP-XACT coherency against RTL, entity and module comparison, design maturity as percentage of unconnected ports.
- Writes out: Verilog, VHDL and IP-XACT design; C model of the memory map for the whole SoC.
- Scriptable: 200+ high-level Tcl commands, hundreds of low-level APIs, Unix-like commands (ls, cd, rename) to browse the design; every GUI action emits its Tcl equivalent.
A minimal integration in the Baya shell
$ curl -fsSL https://edautils.com/install.sh | sh -s -- baya-shell
$ baya-shell
baya> read_ipxact cpu.xml dma.xml uart.xml
baya> read_verilog fabric_axi.v
baya> create_instance cpu0 -component cpu
baya> create_instance dma0 -component dma
baya> auto_connect -protocol axi4
baya> report_connectivity
baya> write_verilog soc_top.v
baya> write_ipxact soc_top.xmlEvery command has -help. The same flow runs from the GUI, which records the Tcl for batch reuse.
Four integration methodologies, one tool
| Methodology | Input | Best for |
|---|---|---|
| IP-XACT based | IEEE 1685 components with bus interfaces | Reusable IP from vendors and internal libraries; standards-driven flows |
| SystemVerilog interface based | RTL using SV interfaces | Teams already on SystemVerilog without IP-XACT |
| XLS / CSV connection tables | Spreadsheet of port and net names | Architects and integrators who specify connectivity in Excel |
| Port-to-port ad hoc | Explicit Tcl connect commands | Glue, exceptions, legacy blocks with no interface metadata |
How Baya compares with commercial SoC integration tools
| Baya (EDAUtils) | Typical commercial integration tools | |
|---|---|---|
| License | Free for commercial and academic use | Paid, per-seat or per-site license |
| Inputs | IP-XACT, Verilog, VHDL, SV interfaces, XLS/CSV | Usually IP-XACT first; RTL import varies |
| Scripting | 200+ Tcl commands, Java API, Python bindings | Tcl or proprietary API |
| Install | One tar.gz, Java 8+, no license server | License server and vendor installer |
| Outputs | Verilog, VHDL, IP-XACT, C model, reports | Verilog, IP-XACT |
| Try before install | Runs in the browser at edautilsonline.com | Evaluation license on request |
Commercial alternatives include Arteris Magillem, Agnisys IDS-Integrate and Defacto SoC Compiler. Baya covers the same integration step at no cost, and imports the IP-XACT those tools produce.
Frequently asked questions
curl -fsSL https://edautils.com/install.sh | sh -s -- baya-shell, or download the archive from the download page, extract it, source setup_env and run baya-shell. Java 8 or newer is required. Linux and Windows are supported.